XIP=XIP_0, SWIP=SWIP_0, HIE=HIE_0, HIRQ=HIRQ_0, HNE=HNE_0, XIRQ=XIRQ_0, REV=REV_0, HIP=HIP_0, XIE=XIE_0, CMPIRQ=CMPIRQ_0, CMPIE=CMPIE_0, DIRQ=DIRQ_0, WDE=WDE_0, XNE=XNE_0, PH1=PH1_0, DIE=DIE_0
Control Register
| CMPIE | Compare Interrupt Enable 0 (CMPIE_0): Disabled 1 (CMPIE_1): Enabled |
| CMPIRQ | Compare Interrupt Request 0 (CMPIRQ_0): No match has occurred (the counter does not match the COMP value) 1 (CMPIRQ_1): COMP match has occurred (the counter matches the COMP value) |
| WDE | Watchdog Enable 0 (WDE_0): Disabled 1 (WDE_1): Enabled |
| DIE | Watchdog Timeout Interrupt Enable 0 (DIE_0): Disabled 1 (DIE_1): Enabled |
| DIRQ | Watchdog Timeout Interrupt Request 0 (DIRQ_0): No Watchdog timeout interrupt has occurred 1 (DIRQ_1): Watchdog timeout interrupt has occurred |
| XNE | Use Negative Edge of INDEX Pulse 0 (XNE_0): Use positive edge of INDEX pulse 1 (XNE_1): Use negative edge of INDEX pulse |
| XIP | INDEX Triggered Initialization of Position Counters UPOS and LPOS 0 (XIP_0): INDEX pulse does not initialize the position counter 1 (XIP_1): INDEX pulse initializes the position counter |
| XIE | INDEX Pulse Interrupt Enable 0 (XIE_0): Disabled 1 (XIE_1): Enabled |
| XIRQ | INDEX Pulse Interrupt Request 0 (XIRQ_0): INDEX pulse has not occurred 1 (XIRQ_1): INDEX pulse has occurred |
| PH1 | Enable Signal Phase Count Mode 0 (PH1_0): Use the standard quadrature decoder, where PHASEA and PHASEB represent a two-phase quadrature signal. 1 (PH1_1): Bypass the quadrature decoder. A positive transition of the PHASEA input generates a count signal. The PHASEB input and the REV bit control the counter direction: If CTRL[REV] = 0, PHASEB = 0, then count up If CTRL[REV] = 1, PHASEB = 1, then count up If CTRL[REV] = 0, PHASEB = 1, then count down If CTRL[REV] = 1, PHASEB = 0, then count down |
| REV | Enable Reverse Direction Counting 0 (REV_0): Count normally 1 (REV_1): Count in the reverse direction |
| SWIP | Software-Triggered Initialization of Position Counters UPOS and LPOS 0 (SWIP_0): No action 1 (SWIP_1): Initialize position counter (using upper and lower initialization registers, UINIT and LINIT) |
| HNE | Use Negative Edge of HOME Input 0 (HNE_0): Use positive-going edge-to-trigger initialization of position counters UPOS and LPOS 1 (HNE_1): Use negative-going edge-to-trigger initialization of position counters UPOS and LPOS |
| HIP | Enable HOME to Initialize Position Counters UPOS and LPOS 0 (HIP_0): No action 1 (HIP_1): HOME signal initializes the position counter |
| HIE | HOME Interrupt Enable 0 (HIE_0): Disabled 1 (HIE_1): Enabled |
| HIRQ | HOME Signal Transition Interrupt Request 0 (HIRQ_0): No transition on the HOME signal has occurred 1 (HIRQ_1): A transition on the HOME signal has occurred |